ic-LF1401 128x1 linear image sensor rev a3, page 1/ 9 features ? 128 active photo pixels of 56 m at a 63.5 m pitch (400 dpi) ? integrating l-v conversion followed by a sample & hold circuit ? high sensitivity and uniformity over wavelength ? high clockrates of up to 5 mhz ? only 128 clocks required for readout ? shutter function enables ?exible integration times ? glitch-free analogue output ? push-pull output ampli?er ? 5 v single supply operation ? can run off external bias to reduce power consumption ? pin-to-pin compatible with tsl1401 applications ? optical line image sensors ? ccd substitute packages olga lf2c obga? lf3c die size (8.5 mm x 1.6 mm) block diagram copyright ? 2005 ic-haus http://www.ichaus.com dis q d c bit 3 q nr d nq nr q c vhe one nq ns nq control bit 1 c multiplexer control and shift register d pixel pixoi pixel 1 nrci snh128 bit 127 rpix(1:128) snh active pixels output c sample and hold nq d bit 2 q ns q bias pixel 2 nr amplifier pixel 128 bit 128 nq d pixei ref c vho agnd ao clk gnd rset si tp vcc vdd ic?lf
ic-LF1401 128x1 linear image sensor rev a3, page 2/ 9 description ic-LF1401 is an integrating light-to-voltage converter with a line of 128 pixels pitched at 63.5 m (center-to- center distance). each pixel consists of a 56.4 m x 200 m photodiode and an integration capacitor with a sample-and-hold circuit. the integrated control logic makes operation very simple, with only a start and clock signal necessary. a third control input (dis) enables the integration to be suspended at any time (electronic shutter). when the start signal is given hold mode is acti- vated for all pixels simultaneously with the next lead- ing clock edge; starting with pixel 1 the hold voltages are switched in sequence to the push-pull output am- pli?er. the second clock pulse resets all integration capacitors and the integration period starts again in the background during the output phase. a run is complete after 128 clock pulses. ic-LF1401 is suitable for high clock rates of up to 5 mhz. if this is not required the supply current can be reduced via the external bias setting (current into pin rset).
ic-LF1401 128x1 linear image sensor rev a3, page 3/ 9 packages olga lf2c, obga? lf3c pin configuration olga lf2c (top view) pin configuration obga? lf3c (top view) pin functions no. name function 1 si start integration input 2 clk clock input 3 ao analogue output 4 vcc +5 v supply voltage 5 rset bias current (connected to gnd for in- ternal bias = default; resistor from vcc to rset for reduced current consump- tion) 6 agnd analogue ground 7 gnd digital ground 8 dis hold integration input chip layout die size: 8.5 mm x 1.6 mm dis gnd agnd tp rset si clk ao vdd vcc pitch 63.5 um active area 56.4 um x 200 um pixel 1 ... ... pixel 128
ic-LF1401 128x1 linear image sensor rev a3, page 4/ 9 absolute maximum ratings beyond these values damage may occur; device operation is not guaranteed. item symbol parameter conditions fig. unit no. min. max. g001 vdd digital supply voltage -0.3 6 v g002 vcc analog supply voltage -0.3 6 v g003 v() voltage at si, clk, dis, rset, tp, ao -0.3 vcc + 0.3 v g004 i() current in rset, tp, ao -10 10 ma g005 vd() esd susceptibility at all pins mil-std-883, method 3015, hbm 100 pf discharged through 1.5 k 2 kv g006 tj operating junction temperature -40 125 c g007 ts storage temperature range see package speci?cation thermal data operating conditions: vcc = vdd = 5 v 10 % item symbol parameter conditions fig. unit no. min. typ. max. t01 ta operating ambient temperature range (extended range on request) see package speci?cation all voltages are referenced to ground unless otherwise stated. all currents into the device pins are positive; all currents out of the device pins are negative.
ic-LF1401 128x1 linear image sensor rev a3, page 5/ 9 electrical characteristics operating conditions: vcc = vdd = 5 v 10 %, rset = gnd, tj = -25...85 c unless otherwise noted item symbol parameter conditions tj fig. unit no. c min. typ. max. total device 001 vdd digital supply voltage range 4.5 5.5 v 002 vcc analog supply voltage range 4.5 5.5 v 003 i(vdd) supply current in vdd f(clk) = 1 mhz 200 300 a 004 i(vcc) supply current in vcc 8 13 ma 005 vc()hi clamp voltage hi at si, clk,dis, tp, rset vc()hi = v() ? v(vcc), i() = 1 ma 0.3 1.8 v 006 vc()lo clamp voltage lo at si, clk,dis, tp, rset vc()hi = v() ? v(agnd), i() = -1 ma -1.5 -0.3 v 007 vc()hi clamp voltage hi at ao vc()hi = v(ao) ? v(vcc), i(ao) = 1 ma 0.3 1.5 v 008 vc()lo clamp voltage lo at ao, vcc, vdd, gnd vc()lo = v() ? v(agnd), i() = -1 ma -1.5 -0.3 v photodiode array 201 a() radiant sensitive area 200 m x 56.40 m per pixel 0.01128 mm2 202 s( )max spectral sensitivity = 680 nm 0.5 a/w 203 ar spectral application range s( ar) = 0.25 x s( )max 400 980 nm analogue output ao 301 vs()lo saturation voltage lo i() = 1 ma 0.5 v 302 vs()hi saturation voltage hi vs()hi = vcc ? v(), i() = -1 ma 1 v 303 k sensitivity = 680 nm, package olga lf2c 2.88 v/pws 304 v0() offset voltage integration time 1 ms, no illumination 400 800 mv 305 ? v0() offset voltage deviation during integration mode ? v0() = v(ao)t1 ? v(ao)t2, ? t = t2 ? t1 = 1 ms -250 50 mv 306 ? v() signal deviation during hold mode ? v0() = v(ao)t1 ? v(ao)t2, ? t = t2 ? t1 = 1 ms -150 150 mv 307 tp(clk- ao) settling time cl(ao) = 10 pf, clk lo hi until v(ao) = 0.98 x v(vcc) 200 ns power-on reset 801 vccon power-on release by vcc 4.4 v 802 vccoff power-down reset by vcc 1 v 803 vcchys hysteresis vcchys = vccon ? vccoff 0.4 1 2 v bias current adjust rset 901 ibias() permissible external bias current 20 100 a 902 vref reference voltage i(rset) = ibias 2.5 3 3.5 v input interface si, clk, dis b01 vt()hi threshold voltage hi 2 1.4 1.8 v b02 vt()lo threshold voltage lo 2 0.9 1.2 v b03 vt()hys hysteresis vt()hys = vt()hi ? vt()lo 2 300 800 mv b04 i() pull-down current 10 30 50 a b05 fclk permissible clock frequency 5 mhz
ic-LF1401 128x1 linear image sensor rev a3, page 6/ 9 optical characteristics: diagrams figure 1: relative spectral sensitivity operating requirements: logic operating conditions: vcc = vdd = 5 v 10 %, tj = -25...85 c input levels lo = 0...0.45 v, hi = 2.4 v...vcc, see fig. 2 for reference levels item symbol parameter conditions fig. unit no. min. max. i001 tset setup time: si stable before clk lo hi 3 50 ns i002 thold hold time:si stable after clk lo hi 3 50 ns figure 2: reference levels figure 3: timing diagram clksi tset thold 400 10 20 30 40 50 60 70 80 90 100 600 800 1000 nm % t v 2.0v0.8v 2.4v 0.45v 0 1 input/output
ic-LF1401 128x1 linear image sensor rev a3, page 7/ 9 description of functions normal operation following an internal power-on reset the integration and hold capacitors are discharged and the sample and hold circuit is set to sample mode. a high signal at si and a rising edge at clk triggers a readout cycle and with it a new integration cycle. in this process the hold capacitors of pixels 1 to 127 are switched to hold mode immediately (snh = 1), with pixel 128 (snh128 = 1) following suit one clock pulse later. this special procedure allows all pixels to be read out with just 128 clock pulses. the integration capacitors are discharged by a one clock long reset signal (nrci = 0) which occurs between the 2 nd and 3 rd falling edge of the readout clock pulse (cf. figure 4). after the 127 pixels have been read out these are again set to sample mode (snh = 0), likewise for pixel 128 one clock pulse later (snh128 = 0). figure 4: readout cycle and integration sequence if prior to the 128 th clock pulse a high signal occurs at si the present readout is halted and immediately reinitiated with pixel 1. in this instance the hold ca- pacitors retain their old value i.e. hold mode prevails (snh/snh128 = 0). figure 5: restarting a readout cycle with more than 128 clock pulses until the next si sig- nal, pixel 1 is output without entering hold mode; the output voltage tracks the voltage of the pixel 1 integra- tion capacitor. pix2 pix3 126 1 128 5 1 pix4 pix5 2 3 pix2 4 pix128 2 pix1 ... ... snh snh128 nrci 2 4 pix4 pix3 127 pix127 pix128 pix126 pix1 pix1 1 128 3 v(ao) clk si snh snh128 nrci integration time pixel 1?127 integration time pixel 128 pix128 pix127 ... pix127 pix128 pix126 127 pix1 1 128 3 v(ao) clk si pix2 pix3 126 1 2 127 128 2 4 ... pix1
ic-LF1401 128x1 linear image sensor rev a3, page 8/ 9 figure 6: clock pulse continued without giving a new integration start signal operation with the shutter function integration can be suspended at any time via pin dis, i.e. the photodiodes are disconnected from their corre- sponding integration capacitor when dis is high and the current integration capacitor voltages are main- tained. if this pin is open or switched to gnd the pixel photocurrents are summed up by the integration ca- pacitors until the next successive si signal follows. figure 7: de?ning the integration time via shutter input dis external bias current setting in order to reduce the power consumption of the device an external reference current can be supplied to pin rset which reduces the maximum readout frequency, however. to this end a resistor must be connected from vcc to rset. if this pin is not used, it should be connected to gnd. this speci?cation is for a newly developed product. ic-haus therefore reserves the right to change or update, without notice, any information contained herein, design and speci?cation; and to discontinue or limit production or distribution of any product versions. please contact ic-haus to ascertain the current data. copying C even as an excerpt C is only permitted with ic-haus approval in writing and precise reference to source. ic-haus does not warrant the accuracy, completeness or timeliness of the speci?cation on this site and does not assume liability for any errors or omissions in the materials. the data speci?ed is intended solely for the purpose of product description. no representations or warranties, either express or implied, of merchantability, ?tness for a particular purpose or of any other nature are made hereunder with respect to information/speci?cation or the products to which information refers and no guarantee with respect to compliance to the intended use is given. in particular, this also applies to the stated possible applications or areas of applications of the product. ic-haus conveys no patent, copyright, mask work right or other trade mark right to this product. ic-haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. pix sample?c 5 6 dis integration integration disabled disabled integration enabled snh 1 nrci 2 ... 1 4 si clk 3 128 127 snh snh128 nrci integration time 131 pix128 pix127 ... pix127 pix128 pix126 127 pix1 1 128 3 v(ao) clk si pix2 pix3 126 129 130 127 128 2 4 ... pix1
ic-LF1401 128x1 linear image sensor rev a3, page 9/ 9 ordering information type package order designation ic-lf olga lf2c ic-lf olga lf2c obga? lf3c ic-lf obga lf3c - ic-lf chip for information about prices, terms of delivery, other packaging options etc. please contact: ic-haus gmbh tel.: +49 (61 35) 92 92-0 am kuemmerling 18 fax: +49 (61 35) 92 92-192 d-55294 bodenheim web: http://www.ichaus.com germany e-mail: sales@ichaus.com
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